For MacroAssemblerMIPS::memoryFence() and ::storeFence(), we use a sync instruction with SYNC (0) in the stype field. We should check whether the optional SYNC_MB (0x10) stype can work for our needs. It is defined as forcing the order of memory accesses, but unlike SYNC, SYNC_MB does not require all older instructions to be completed when the sync instruction completes, but only that they reach the load/store ordering point before the sync instruction completes, which is a slightly lighter constraint that should still be good enough for us, while potentially having a lower performance hit.
See also the discussion in https://bugs.webkit.org/show_bug.cgi?id=169705