The BaseIndex address calculation should use a different type/sized index depending on the type of the instruction that is using it. This is an x86_64-ism that wasn't previously captured.
Created attachment 171736 [details]
Comment on attachment 171736 [details]
Mark and I found a bug while looking at this.
Also, the index register used in BaseIndex addressing is expected to be of size intptr_t.
Created attachment 171780 [details]
The real fix.
Comment on attachment 171780 [details]
The real fix.
Landed in r133131: <http://trac.webkit.org/changeset/133131>.
The svn commit message for it was erroneous. It should have said:
=== BEGIN ===
C++ llint 64-bit backend needs to zero extend results of int32 operations.
Reviewed by Filip Pizlo.
llint asm instructions ending in "i" for a 64-bit machine expects the
high 32-bit of registers to be zero'ed out when a 32-bit instruction
writes into a register. Fixed the C++ llint to honor this.
Fixed the index register used in BaseIndex addressing to be of size
intptr_t as expected.
Updated CLoopRegister to handle different endiannesss configurations.
- new method to clear the high 32-bit of a 64-bit register.
It's a no-op for the 32-bit build.
- CLoopRegister now takes care of packing and byte endianness order.
(JSC::CLoop::execute): - Added an assert.
- Add calls to clearHighWord() wherever needed.
=== END ===