Currently the native call enhancement is available on x86 with JSValue32_64 and on x86_64 with JSValue64. I am going to upload a patch which adds this call support for ARM and Thumb-2 JIT as well.
Created attachment 58020 [details] Add native call support for ARM and Thumb-2 JIT with JSValue32. Same technique was used as on x86_64 with some limitations. - we cannot use regT0 for the new callframe, because r0 (=regT0) should be the first argument of the host function. - a callee preserved register should be used to hold the return address instead of the stack. - preserveReturnAddressAfterCall/restoreReturnAddressBeforeReturn functions should be used to work with return address (instead of peek/poke on stack).
Attachment 58020 [details] did not pass style-queue: Failed to run "['WebKitTools/Scripts/check-webkit-style', '--no-squash']" exit_code: 1 JavaScriptCore/jit/JITOpcodes.cpp:249: Extra space before ( in function call [whitespace/parens] [4] JavaScriptCore/wtf/Platform.h:973: More than one command on the same line in if [whitespace/parens] [4] Total errors found: 2 in 3 files If any of these errors are false positives, please file a bug against check-webkit-style.
Created attachment 58025 [details] Add native call support for ARM and Thumb-2 JIT It was easy to add the native call support for JSValue32_64 as well. So, this patch contains the native call enhancement for each ARM JIT and for each supported JSValue representations.
Attachment 58025 [details] did not pass style-queue: Failed to run "['WebKitTools/Scripts/check-webkit-style', '--no-squash']" exit_code: 1 JavaScriptCore/wtf/Platform.h:973: More than one command on the same line in if [whitespace/parens] [4] Total errors found: 1 in 4 files If any of these errors are false positives, please file a bug against check-webkit-style.
Comment on attachment 58025 [details] Add native call support for ARM and Thumb-2 JIT JavaScriptCore/jit/JITOpcodes.cpp:226 + restoreReturnAddressBeforeReturn(regT3); This implies that the link register is caller save. Is it? I thought it was callee save. r=me
> + restoreReturnAddressBeforeReturn(regT3); > This implies that the link register is caller save. Is it? I thought it was callee save. The link register (r14) is caller-save. The callee-save registers are: r4-r11.
Committed revision 61614.