In nativeForGenerator and privateCompileCTINativeCall functions, CPU(MIPS) path could be merged with CPU(ARM) || CPU(SH4) path to reduce architecture specific code. Moreover, this is likely to fix a potential issue in mips port: with current implementation Callee is put in MIPSRegisters::a2 instead of MIPSRegisters::a1 (argumentGPR1).
Created attachment 218152 [details] Merge mips and arm/sh4 paths in nativeForGenerator and privateCompileCTINativeCall functions. I don't see regressions on my mips board with this patch, but I'd like to have a feedback from homejinni or mips guys before putting it into the commit queue.
(In reply to comment #1) > Created an attachment (id=218152) [details] > Merge mips and arm/sh4 paths in nativeForGenerator and privateCompileCTINativeCall functions. > > I don't see regressions on my mips board with this patch, but I'd like to have a feedback from homejinni or mips guys before putting it into the commit queue. I am on holiday so I can check/test it tomorrow. And I will definitely :)
(In reply to comment #2) > I am on holiday so I can check/test it tomorrow. And I will definitely :) Thanks! I won't request commit queue before your feedback then.. and enjoy your day off :) About the MIPSRegisters::a2 thing, perhaps it's just used as a temp register so I'm not sure it could fix something.
Comment on attachment 218152 [details] Merge mips and arm/sh4 paths in nativeForGenerator and privateCompileCTINativeCall functions. Looks fine. Will cq+ after kilvadyb@homejinni.com provides results from testing.
(In reply to comment #4) > (From update of attachment 218152 [details]) > Looks fine. Will cq+ after kilvadyb@homejinni.com provides results from testing. Looks good to me also, no more regressions with this patch.(In reply to comment #4) > (From update of attachment 218152 [details]) > Looks fine. Will cq+ after kilvadyb@homejinni.com provides results from testing. Looks good to me also, no more regressions with this patch. a2 was used as a temporary scratch register in the previous code and now argumentGPR1 == a1 is the scratch reg on MIPS which is also fine.
(In reply to comment #5) > Looks good to me also, no more regressions with this patch. a2 was used as a temporary scratch register in the previous code and now argumentGPR1 == a1 is the scratch reg on MIPS which is also fine. Great, I'm requesting commit queue then. Thanks!
Comment on attachment 218152 [details] Merge mips and arm/sh4 paths in nativeForGenerator and privateCompileCTINativeCall functions. Clearing flags on attachment: 218152 Committed r159995: <http://trac.webkit.org/changeset/159995>
All reviewed patches have been landed. Closing bug.