185464 2018-05-08 22:23:16 -0700 [MIPS] Use mfhc1 and mthc1 to fix assembler error 2018-05-24 06:17:35 -0700 1 1 1 Unclassified WebKit New Bugs WebKit Nightly Build Unspecified Unspecified RESOLVED FIXED InRadar P2 Normal --- 1 dominik.infuehr webkit-unassigned commit-queue ews-watchlist fpizlo ggaren keith_miller loic.yhuel mark.lam mcatanzaro msaboff olivier.blin saam webkit-bug-importer ysuzuki oldest_to_newest 1422139 0 dominik.infuehr 2018-05-08 22:23:16 -0700 [MIPS] Use mfhc1 and mthc1 to fix assembler error 1422140 1 339930 dominik.infuehr 2018-05-08 22:27:19 -0700 Created attachment 339930 Patch 1422147 2 339930 commit-queue 2018-05-08 23:29:10 -0700 Comment on attachment 339930 Patch Rejecting attachment 339930 from commit-queue. Failed to run "['/Volumes/Data/EWS/WebKit/Tools/Scripts/webkit-patch', '--status-host=webkit-queues.webkit.org', '--bot-id=webkit-cq-02', 'land-attachment', '--force-clean', '--non-interactive', '--parent-command=commit-queue', 339930, '--port=mac']" exit_code: 2 cwd: /Volumes/Data/EWS/WebKit Last 500 characters of output: ing rebase: :040000 040000 4dd5f054ca0fd1facf03faceff772d7f02351f71 5d2ee099462e6ac44ce4a6829a77d3db3d944b92 M Source Current branch master is up to date. ERROR: Not all changes have been committed into SVN, however the committed ones (if any) seem to be successfully integrated into the working tree. Please see the above messages for details. Failed to run "['git', 'svn', 'dcommit', '--rmdir']" exit_code: 1 cwd: /Volumes/Data/EWS/WebKit Updating OpenSource Current branch master is up to date. Full output: http://webkit-queues.webkit.org/results/7620528 1422200 3 339930 commit-queue 2018-05-09 01:53:22 -0700 Comment on attachment 339930 Patch Clearing flags on attachment: 339930 Committed r231552: <https://trac.webkit.org/changeset/231552> 1422201 4 commit-queue 2018-05-09 01:53:23 -0700 All reviewed patches have been landed. Closing bug. 1422202 5 webkit-bug-importer 2018-05-09 01:54:18 -0700 <rdar://problem/40086712> 1426597 6 loic.yhuel 2018-05-23 08:40:38 -0700 This change breaks the build on MIPS32r1 (which doesn't support mfhc1 and mthc1). I assume the assembler error was on a -mfpxx or -mfp64 target, which runs (or should be able to run for -mfpxx) with FR=1 (f0..f31 are independent 64 bit registers). The original code is fine with -mfp32, running with FR=0 (f0..f31 are 32 bit registers, instructions operating on double use two even+odd register), which is the only mode supported on MIPS32r1. https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking 1426913 7 dominik.infuehr 2018-05-24 06:17:35 -0700 I've tried to fix that in https://bugs.webkit.org/show_bug.cgi?id=185944. What do you think? 339930 2018-05-08 22:27:19 -0700 2018-05-09 01:53:22 -0700 Patch bug-185464-20180509072718.patch text/plain 2003 dominik.infuehr U3VidmVyc2lvbiBSZXZpc2lvbjogMjMxNDgzCmRpZmYgLS1naXQgYS9Tb3VyY2UvSmF2YVNjcmlw dENvcmUvQ2hhbmdlTG9nIGIvU291cmNlL0phdmFTY3JpcHRDb3JlL0NoYW5nZUxvZwppbmRleCBl NjlhM2NmMjVkMDQ2MzZkZGYyZWMxYTZiZjU3NTFlMTc0ODYwOTQ4Li5iZmYwZTE1N2FlYzI5NmU3 MTVmNDEwZjBjZjA2YmQ4ZTFjN2ExMTFkIDEwMDY0NAotLS0gYS9Tb3VyY2UvSmF2YVNjcmlwdENv cmUvQ2hhbmdlTG9nCisrKyBiL1NvdXJjZS9KYXZhU2NyaXB0Q29yZS9DaGFuZ2VMb2cKQEAgLTEs MyArMSwxNiBAQAorMjAxOC0wNS0wOCAgRG9taW5payBJbmZ1ZWhyICA8ZGluZnVlaHJAaWdhbGlh LmNvbT4KKworICAgICAgICBbTUlQU10gVXNlIG1maGMxIGFuZCBtdGhjMSB0byBmaXggYXNzZW1i bGVyIGVycm9yCisgICAgICAgIGh0dHBzOi8vYnVncy53ZWJraXQub3JnL3Nob3dfYnVnLmNnaT9p ZD0xODU0NjQKKworICAgICAgICBSZXZpZXdlZCBieSBOT0JPRFkgKE9PUFMhKS4KKworICAgICAg ICBUaGUgYmludXRpbHMtYXNzZW1ibGVyIHN0YXJ0ZWQgdG8gcmVwb3J0IGZhaWx1cmVzIGZvciBj b3B5aW5nIHdvcmRzIGJldHdlZW4KKyAgICAgICAgR1AgYW5kIEZQIHJlZ2lzdGVycyBmb3Igb2Rk IEZQIHJlZ2lzdGVyIGluZGljZXMuIFVzZSBtZmhjMSBhbmQgbXRoYzEgaW5zdGVhZAorICAgICAg ICBvZiBtZmMxIGFuZCBtdGMxIGZvciBjb252ZXJzaW9uLgorCisgICAgICAgICogb2ZmbGluZWFz bS9taXBzLnJiOgorCiAyMDE4LTA1LTA3ICBEYW5pZWwgQmF0ZXMgIDxkYWJhdGVzQGFwcGxlLmNv bT4KIAogICAgICAgICBDaGVjayBYLUZyYW1lLU9wdGlvbnMgYW5kIENTUCBmcmFtZS1hbmNlc3Rv cnMgaW4gbmV0d29yayBwcm9jZXNzCmRpZmYgLS1naXQgYS9Tb3VyY2UvSmF2YVNjcmlwdENvcmUv b2ZmbGluZWFzbS9taXBzLnJiIGIvU291cmNlL0phdmFTY3JpcHRDb3JlL29mZmxpbmVhc20vbWlw cy5yYgppbmRleCA4YjcxZjI4N2YwYWMyY2NmMTcwOTFlZmU5OWFmZTFjOTU0ZDU2M2UyLi4zMmVl YTVhZDFhN2Q2MGM4MDIwYTEwMTRlMTdmMjBlMWI3NjczY2MyIDEwMDY0NAotLS0gYS9Tb3VyY2Uv SmF2YVNjcmlwdENvcmUvb2ZmbGluZWFzbS9taXBzLnJiCisrKyBiL1NvdXJjZS9KYXZhU2NyaXB0 Q29yZS9vZmZsaW5lYXNtL21pcHMucmIKQEAgLTEwMTQsMTAgKzEwMTQsMTAgQEAgY2xhc3MgSW5z dHJ1Y3Rpb24KICAgICAgICAgICAgICRhc20ucHV0cyAic3cgI3tvcGVyYW5kc1sxXS5taXBzT3Bl cmFuZH0sICN7b3BlcmFuZHNbMF0udmFsdWUgKiA0fSgkc3ApIgogICAgICAgICB3aGVuICJmaWky ZCIKICAgICAgICAgICAgICRhc20ucHV0cyAibXRjMSAje29wZXJhbmRzWzBdLm1pcHNPcGVyYW5k fSwgI3tvcGVyYW5kc1syXS5taXBzU2luZ2xlTG99IgotICAgICAgICAgICAgJGFzbS5wdXRzICJt dGMxICN7b3BlcmFuZHNbMV0ubWlwc09wZXJhbmR9LCAje29wZXJhbmRzWzJdLm1pcHNTaW5nbGVI aX0iCisgICAgICAgICAgICAkYXNtLnB1dHMgIm10aGMxICN7b3BlcmFuZHNbMV0ubWlwc09wZXJh bmR9LCAje29wZXJhbmRzWzJdLm1pcHNTaW5nbGVMb30iCiAgICAgICAgIHdoZW4gImZkMmlpIgog ICAgICAgICAgICAgJGFzbS5wdXRzICJtZmMxICN7b3BlcmFuZHNbMV0ubWlwc09wZXJhbmR9LCAj e29wZXJhbmRzWzBdLm1pcHNTaW5nbGVMb30iCi0gICAgICAgICAgICAkYXNtLnB1dHMgIm1mYzEg I3tvcGVyYW5kc1syXS5taXBzT3BlcmFuZH0sICN7b3BlcmFuZHNbMF0ubWlwc1NpbmdsZUhpfSIK KyAgICAgICAgICAgICRhc20ucHV0cyAibWZoYzEgI3tvcGVyYW5kc1syXS5taXBzT3BlcmFuZH0s ICN7b3BlcmFuZHNbMF0ubWlwc1NpbmdsZUxvfSIKICAgICAgICAgd2hlbiAvXmJvLwogICAgICAg ICAgICAgJGFzbS5wdXRzICJiZ3QgI3tvcGVyYW5kc1swXS5taXBzT3BlcmFuZH0sICN7b3BlcmFu ZHNbMV0ubWlwc09wZXJhbmR9LCAje29wZXJhbmRzWzJdLmFzbUxhYmVsfSIKICAgICAgICAgd2hl biAvXmJzLwo=