151735 2015-12-01 17:38:35 -0800 [JSC] Handle x86 partial register stalls in Air 2015-12-04 04:00:04 -0800 1 1 1 Unclassified WebKit New Bugs WebKit Nightly Build Unspecified Unspecified RESOLVED FIXED P2 Normal --- 151857 1 benjamin benjamin commit-queue fpizlo ggaren keith_miller mark.lam msaboff saam oldest_to_newest 1145488 0 benjamin 2015-12-01 17:38:35 -0800 [JSC] Handle x86 partial register stalls in Air 1145490 1 266419 benjamin 2015-12-01 17:53:52 -0800 Created attachment 266419 Patch 1145515 2 266419 fpizlo 2015-12-01 20:40:23 -0800 Comment on attachment 266419 Patch View in context: https://bugs.webkit.org/attachment.cgi?id=266419&action=review This looks really good - but I think you should change how you use FPRInfo. > Source/JavaScriptCore/ChangeLog:25 > + information from block to block until no unsafe chain in found. *is found > Source/JavaScriptCore/ChangeLog:34 > + -Anything with a special can have hidden instructions. We should weight that. Interesting! Most specials can tell you precisely what is going on: C call can tell you that it's a call, and checks can tell you the exact instruction. The patchpoint special is super weird though. If we can abstract the effect on the FPU as something as broad as "doesFloatMath" then we could add it as a field in B3::PatchpointValue. > Source/JavaScriptCore/b3/air/AirFixPartialRegisterStalls.cpp:126 > +#if !CPU(X86_64) Let's use "if (!isX86()) return;". I think that it's best if the compiler avoids #if's. I've found it to be super confusing because a compiler usually has two inherent levels of meta: there is the program and there is the program that the program is operating on. The C preprocessor adds a third-level - now you have a program that is modifying the program that is operating on some program. Luckily, the meta nature of a compiler means that you can get away with run-time architecture checks. And the "run-time check" that I'm proposing is actually constant-folded by the compiler anyway. > Source/JavaScriptCore/b3/air/AirFixPartialRegisterStalls.cpp:217 > + if (localDistance.distance[FPRInfo::toIndex(reg.fpr())] < minimumSafeDistance) We should avoid using GPRInfo and FPRInfo register indexing in Air. If we need something like a register index, we should introduce this as a concept in Air or somewhere else. This is because GPRInfo and FPRInfo have register "indexes" for those registers that are legal to use for user values in the DFG. > Source/JavaScriptCore/jit/FPRInfo.h:49 > - static const unsigned numberOfRegisters = 6; > +#if CPU(X86_64) > + static const unsigned numberOfRegisters = 16; > +#else > + static const unsigned numberOfRegisters = 8; > +#endif > + This is a potentially dangerous change, since it makes the DFG use more xmm registers. That's possibly bad because there may be assumptions about the top xmm registers being available for scratch. I think if we wanted to change this constant, then we should do it as its own patch and with the understanding that FPRInfo::numberOfRegisters is NOT the number of FPRs in the CPU, but rather, the number of FPU registers that we want the DFG to use. I don't think you should need to touch this code, because it would be wrong to use GPRInfo/FPRInfo "indexes" inside Air. Those indexes have a pretty specific meaning in the DFG register allocator and the scratch register allocator used in polymorphic inline caches. So, I think that what you really want is a true notion of register index - i.e. not what GPRInfo/FPRInfo call the "index". If you want this, then you should create such a thing, either in the assembler directory - possibly as a new API in MacroAssembler - or as a set of helpers inside Air. 1145520 3 266428 benjamin 2015-12-01 21:16:56 -0800 Created attachment 266428 Patch 1145521 4 benjamin 2015-12-01 21:18:48 -0800 (In reply to comment #2) > This is a potentially dangerous change, since it makes the DFG use more xmm > registers. That's possibly bad because there may be assumptions about the > top xmm registers being available for scratch. I think if we wanted to > change this constant, then we should do it as its own patch and with the > understanding that FPRInfo::numberOfRegisters is NOT the number of FPRs in > the CPU, but rather, the number of FPU registers that we want the DFG to use. > > I don't think you should need to touch this code, because it would be wrong > to use GPRInfo/FPRInfo "indexes" inside Air. Those indexes have a pretty > specific meaning in the DFG register allocator and the scratch register > allocator used in polymorphic inline caches. > > So, I think that what you really want is a true notion of register index - > i.e. not what GPRInfo/FPRInfo call the "index". If you want this, then you > should create such a thing, either in the assembler directory - possibly as > a new API in MacroAssembler - or as a set of helpers inside Air. Looks like the MacroAssembler already had what we need. 1145531 5 266433 benjamin 2015-12-01 23:55:19 -0800 Created attachment 266433 Patch 1145594 6 266448 benjamin 2015-12-02 09:56:35 -0800 Created attachment 266448 Patch for landing 1145614 7 266448 commit-queue 2015-12-02 10:49:23 -0800 Comment on attachment 266448 Patch for landing Clearing flags on attachment: 266448 Committed r192946: <http://trac.webkit.org/changeset/192946> 1145615 8 commit-queue 2015-12-02 10:49:26 -0800 All reviewed patches have been landed. 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