ChangeLog

2019-01-08  Dominik Infuehr  <dinfuehr@igalia.com>

        Enable DFG on ARM/Linux again

        https://bugs.webkit.org/show_bug.cgi?id=192496

        Reviewed by NOBODY (OOPS!).

        After changing the bytecode format DFG was disabled on all 32-bit

        architectures. Enable DFG now again on ARM/Linux. Do not use register

        r11 in compiled DFG mode since it is already used in LLInt as metadataTable

        register. Also clean up code since ARM traditional isn't supported anymore.

        * dfg/DFGOSRExit.cpp:

        (JSC::DFG::restoreCalleeSavesFromVMEntryFrameCalleeSavesBuffer):

        (JSC::DFG::copyCalleeSavesToVMEntryFrameCalleeSavesBuffer):

        * jit/CallFrameShuffler.cpp:

        (JSC::CallFrameShuffler::CallFrameShuffler):

        * jit/GPRInfo.h:

        (JSC::GPRInfo::toIndex):

        * llint/LowLevelInterpreter32_64.asm:

        * offlineasm/arm.rb:

2019-01-07  Devin Rousso  <drousso@apple.com>

        Web Inspector: extend XHR breakpoints to work with fetch

Source/WTF/ChangeLog

2019-01-08  Dominik Infuehr  <dinfuehr@igalia.com>

        Enable DFG on ARM/Linux again

        https://bugs.webkit.org/show_bug.cgi?id=192496

        Reviewed by NOBODY (OOPS!).

        After changing the bytecode format DFG was disabled on all 32-bit

        architectures. Enable DFG now again on ARM/Linux.

        * wtf/Platform.h:

2019-01-07  David Kilzer  <ddkilzer@apple.com>

        Prefer RetainPtr<NSObject> to RetainPtr<NSObject *>

Source/JavaScriptCore/assembler/AbstractMacroAssembler.h

@@public:

            m_jumps.append(other.m_jumps.begin(), other.m_jumps.size());

        }

752 bool empty()

752 bool empty() const

        {

            return !m_jumps.size();

        }

Source/JavaScriptCore/dfg/DFGOSRExit.cpp

@@static JSValue jsValueFor(CPUState& cpu, JSValueSource source)

#if NUMBER_OF_CALLEE_SAVES_REGISTERS > 0

78 static_assert(is64Bit(), "we only support callee save registers on 64-bit");

79

// Based on AssemblyHelpers::emitRestoreCalleeSavesFor().

static void restoreCalleeSavesFor(Context& context, CodeBlock* codeBlock)

{

@@static void restoreCalleeSavesFromVMEntryFrameCalleeSavesBuffer(Context& context

        size_t uintptrOffset = entry.offset() / sizeof(UCPURegister);

        if (entry.reg().isGPR())

            context.gpr(entry.reg().gpr()) = calleeSaveBuffer[uintptrOffset];

140 else

138 else {

139#if USE(JSVALUE64)

141140 context.fpr(entry.reg().fpr()) = bitwise_cast<double>(calleeSaveBuffer[uintptrOffset]);

#else

            // FIXME: support callee-saved floating point registers on 32-bit architectures

            RELEASE_ASSERT_NOT_REACHED();

#endif

        }

    }

}

@@static void copyCalleeSavesToVMEntryFrameCalleeSavesBuffer(Context& context)

            continue;

        if (entry.reg().isGPR())

            stack.set(calleeSaveBuffer, entry.offset(), context.gpr<UCPURegister>(entry.reg().gpr()));

164 else

168 else {

169#if USE(JSVALUE64)

165170 stack.set(calleeSaveBuffer, entry.offset(), context.fpr<UCPURegister>(entry.reg().fpr()));

#else

            // FIXME: support callee-saved floating point registers on 32-bit architectures

            RELEASE_ASSERT_NOT_REACHED();

#endif

        }

    }

}

Source/JavaScriptCore/jit/CallFrameShuffler.cpp

@@CallFrameShuffler::CallFrameShuffler(CCallHelpers& jit, const CallFrameShuffleDa

        m_lockedRegisters.clear(GPRInfo::toRegister(i));

    for (unsigned i = FPRInfo::numberOfRegisters; i--; )

        m_lockedRegisters.clear(FPRInfo::toRegister(i));

54 // ... as well as the runtime registers.

#if USE(JSVALUE64)

    // ... as well as the runtime registers on 64-bit architectures.

    // However do not use these registers on 32-bit architectures since

    // saving and restoring callee-saved registers in CallFrameShuffler isn't supported

    // on 32-bit architectures yet.

5560 m_lockedRegisters.exclude(RegisterSet::vmCalleeSaveRegisters());

61#endif

    ASSERT(!data.callee.isInJSStack() || data.callee.virtualRegister().isLocal());

    addNew(VirtualRegister(CallFrameSlot::callee), data.callee);

Source/JavaScriptCore/jit/GPRInfo.h

@@public:

#if CPU(ARM)

#define NUMBER_OF_ARGUMENT_REGISTERS 4u

531 #if CPU(ARM_THUMB2)

532531#define NUMBER_OF_CALLEE_SAVES_REGISTERS 1u

#else

#define NUMBER_OF_CALLEE_SAVES_REGISTERS 0u

#endif

class GPRInfo {

public:

@@public:

    static const GPRReg regT4 = ARMRegisters::r8;

    static const GPRReg regT5 = ARMRegisters::r9;

    static const GPRReg regT6 = ARMRegisters::r10;

#if CPU(ARM_THUMB2)

    static const GPRReg regT7 = ARMRegisters::r11;

#else 

    static const GPRReg regT7 = ARMRegisters::r7;

#endif

547 static const GPRReg regT7 = ARMRegisters::r5;

    static const GPRReg regT8 = ARMRegisters::r4;

    static const GPRReg regCS0 = ARMRegisters::r11;

    // These registers match the baseline JIT.

@@public:

        ASSERT(reg != InvalidGPRReg);

        ASSERT(static_cast<int>(reg) < 16);

        static const unsigned indexForRegister[16] =

#if CPU(ARM_THUMB2)

            { 0, 1, 2, 3, 8, InvalidIndex, InvalidIndex, InvalidIndex, 4, 5, 6, 7, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };

#else

            { 0, 1, 2, 3, 8, InvalidIndex, InvalidIndex, 7, 4, 5, 6, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };

#endif

582 { 0, 1, 2, 3, 8, 7, InvalidIndex, InvalidIndex, 4, 5, 6, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex, InvalidIndex };

        unsigned result = indexForRegister[reg];

        return result;

    }

Source/JavaScriptCore/llint/LowLevelInterpreter32_64.asm

@@end)

op(llint_throw_from_slow_path_trampoline, macro()

    loadp Callee[cfr], t1

    andp MarkedBlockMask, t1

    loadp MarkedBlockFooterOffset + MarkedBlock::Footer::m_vm[t1], t1

    copyCalleeSavesToVMEntryFrameCalleeSavesBuffer(t1, t2)

    callSlowPath(_llint_slow_path_handle_exception)

    # When throwing from the interpreter (i.e. throwing from LLIntSlowPaths), so

@@op(llint_throw_from_slow_path_trampoline, macro()

    loadp Callee[cfr], t1

    andp MarkedBlockMask, t1

    loadp MarkedBlockFooterOffset + MarkedBlock::Footer::m_vm[t1], t1

2013 copyCalleeSavesToVMEntryFrameCalleeSavesBuffer(t1, t2)

    jmp VM::targetMachinePCForThrow[t1]

end)

Source/JavaScriptCore/offlineasm/arm.rb

@@require "risc"

#  x2 => t2, a2, r2

#  x3 => t3, a3, r3

#  x6 =>            (callee-save scratch)

37 # x7 => cfr ~~(ARMv7 only)~~

37# x7 => cfr

#  x8 => t4         (callee-save)

#  x9 => t5         (callee-save)

# x10 =>            (callee-save scratch)

@@require "risc"

# d6 =>              (scratch)

# d7 =>              (scratch)

def isARMv7

    case $activeBackend

    when "ARMv7"

        true

    else

        raise "bad value for $activeBackend: #{$activeBackend}"

    end

end

class Node

    def armSingle

        doubleOperand = armOperand

@@def armMoveImmediate(value, register)

        $asm.puts "mov #{register.armOperand}, \##{value}"

    elsif (~value) >= 0 && (~value) < 256

        $asm.puts "mvn #{register.armOperand}, \##{~value}"

94 els~~if isARMv7~~

85 else

        $asm.puts "movw #{register.armOperand}, \##{value & 0xffff}"

        if (value & 0xffff0000) != 0

            $asm.puts "movt #{register.armOperand}, \##{(value >> 16) & 0xffff}"

        end

99 else

100 $asm.puts "ldr #{register.armOperand}, =#{value}"

    end

end

@@class RegisterID

        when "t5"

            "r9"

        when "cfr"

122 ~~isARMv7 ?~~ "r7" ~~: "r11"~~

111 "r7"

        when "csr0"

            "r11"

        when "lr"

@@class Instruction

            else

                $asm.puts "mov pc, #{operands[0].armOperand}"

            end

            if not isARMv7 and not isARMv7Traditional

                $asm.puts ".ltorg"

            end

        when "call"

            if operands[0].label?

                if OS_DARWIN

@@class Instruction

            $asm.puts "add #{dest.armOperand}, pc, #{dest.armOperand}"

            $asm.puts "ldr #{dest.armOperand}, [#{dest.armOperand}, #{temp.armOperand}]"

695 offset = ~~$activeBackend == "ARMv7" ?~~ ~~4 : 8~~

681 offset = 4

            $asm.deferNextLabelAction {

                $asm.puts "#{gotLabel}:"

Source/WTF/wtf/Platform.h

#if !defined(ENABLE_JIT)

#define ENABLE_JIT 1

#endif

/* But still disable DFG for now. */

#undef ENABLE_DFG_JIT

#define ENABLE_DFG_JIT 0

#else

/* Disable JIT and force C_LOOP on all 32bit-architectures but ARMv7-Thumb2/Linux. */

#undef ENABLE_JIT

Tools/ChangeLog

2019-01-08  Dominik Infuehr  <dinfuehr@igalia.com>

        Enable DFG on ARM/Linux again

        https://bugs.webkit.org/show_bug.cgi?id=192496

        Reviewed by NOBODY (OOPS!).

        After changing the bytecode format DFG was disabled on all 32-bit

        architectures. Enable DFG now again on ARM/Linux. Run again JIT-tests

        on ARM by default.

        * Scripts/run-jsc-stress-tests:

2019-01-07  David Kilzer  <ddkilzer@apple.com>

        Leak of ScrollCompletionCallbackData (16 bytes) in com.apple.WebKit.WebContent running WebKit layout tests

Tools/Scripts/run-jsc-stress-tests

@@$hostOS = determineOS unless $hostOS

$architecture = determineArchitecture unless $architecture

$isFTLPlatform = !($architecture == "x86" || $architecture == "arm" || $architecture == "mips" || $hostOS == "windows")

452 if [~~"arm",~~ "mips", "x86"].include?($architecture)

452if ["mips", "x86"].include?($architecture)

    # The JIT is temporarily disabled on these platforms since

    # https://trac.webkit.org/changeset/237547

    $jitTests = false

LayoutTests/ChangeLog

2019-01-08  Dominik Infuehr  <dinfuehr@igalia.com>

        Enable DFG on ARM/Linux again

        https://bugs.webkit.org/show_bug.cgi?id=192496

        Reviewed by NOBODY (OOPS!).

        After changing the bytecode format DFG was disabled on all 32-bit

        architectures. Enable DFG now again on ARM/Linux. Disable tests that

        run out of executable memory with LLInt disabled.

        * js/script-tests/dfg-float32array.js:

        * js/script-tests/dfg-float64array.js:

        * js/script-tests/dfg-int16array.js:

        * js/script-tests/dfg-int32array-overflow-values.js:

        * js/script-tests/dfg-int32array.js:

        * js/script-tests/dfg-int8array.js:

        * js/script-tests/dfg-uint16array.js:

        * js/script-tests/dfg-uint32array.js:

        * js/script-tests/dfg-uint8array.js:

2019-01-07  Youenn Fablet  <youenn@apple.com>

        LayoutTests/http/wpt/fetch/csp-reports-bypass-csp-checks.html is flaky

LayoutTests/js/script-tests/dfg-float32array.js

1 //@ noNoLLIntRunLayoutTest if $architecture == "arm" ~~and $hostOS == "darwin"~~