Source/JavaScriptCore/ChangeLog

 12017-03-11 Yusuke Suzuki <utatane.tea@gmail.com>
 2
 3 [JSC][Linux] Implement VMTrap in Linux ports
 4 https://bugs.webkit.org/show_bug.cgi?id=169436
 5
 6 Reviewed by NOBODY (OOPS!).
 7
 8 This patch port VMTrap to Linux ports.
 9 We extract MachineContext accessors from various places (wasm/, heap/ and tools/)
 10 and use them in all the JSC code.
 11
 12 * JavaScriptCore.xcodeproj/project.pbxproj:
 13 * heap/MachineStackMarker.cpp:
 14 (JSC::MachineThreads::Thread::Registers::stackPointer):
 15 (JSC::MachineThreads::Thread::Registers::framePointer):
 16 (JSC::MachineThreads::Thread::Registers::instructionPointer):
 17 (JSC::MachineThreads::Thread::Registers::llintPC):
 18 * heap/MachineStackMarker.h:
 19 * runtime/MachineContext.h: Added.
 20 (JSC::MachineContext::stackPointer):
 21 (JSC::MachineContext::framePointer):
 22 (JSC::MachineContext::instructionPointer):
 23 (JSC::MachineContext::argumentPointer<1>):
 24 (JSC::MachineContext::llintInstructionPointer):
 25 (JSC::MachineContext::argumentPointer):
 26 * runtime/PlatformThread.h:
 27 (JSC::platformThreadSignal):
 28 * runtime/VMTraps.cpp:
 29 (JSC::SignalContext::SignalContext):
 30 (JSC::SignalContext::adjustPCToPointToTrappingInstruction):
 31 * tools/CodeProfiling.cpp:
 32 (JSC::profilingTimer):
 33 * tools/SigillCrashAnalyzer.cpp:
 34 (JSC::SignalContext::SignalContext):
 35 (JSC::SignalContext::dump):
 36 * tools/VMInspector.cpp:
 37 * wasm/WasmFaultSignalHandler.cpp:
 38 (JSC::Wasm::trapHandler):
 39
1402017-03-10 Filip Pizlo <fpizlo@apple.com>
241
342 The JITs should be able to emit fast TLS loads

Source/WTF/ChangeLog

 12017-03-11 Yusuke Suzuki <utatane.tea@gmail.com>
 2
 3 [JSC][Linux] Implement VMTrap in Linux ports
 4 https://bugs.webkit.org/show_bug.cgi?id=169436
 5
 6 Reviewed by NOBODY (OOPS!).
 7
 8 Enable VMTrap mechanism for Linux and FreeBSD.
 9
 10 * wtf/Platform.h:
 11
1122017-03-10 Filip Pizlo <fpizlo@apple.com>
213
314 The JITs should be able to emit fast TLS loads

Source/JavaScriptCore/JavaScriptCore.xcodeproj/project.pbxproj

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 6941 28806E21155E478A93FA7B02 /* MachineContext.h */,
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69416944 sourceTree = "<group>";

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 9380 981ED82328234D91BAECCADE /* MachineContext.h in Headers */,
93779381 );
93789382 runOnlyForDeploymentPostprocessing = 0;
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Source/JavaScriptCore/heap/MachineStackMarker.cpp

@@size_t MachineThreads::Thread::getRegisters(Thread::Registers& registers)
481481
482482void* MachineThreads::Thread::Registers::stackPointer() const
483483{
484 #if OS(DARWIN)
485 
486 #if __DARWIN_UNIX03
487 
488 #if CPU(X86)
489  return reinterpret_cast<void*>(regs.__esp);
490 #elif CPU(X86_64)
491  return reinterpret_cast<void*>(regs.__rsp);
492 #elif CPU(PPC) || CPU(PPC64)
493  return reinterpret_cast<void*>(regs.__r1);
494 #elif CPU(ARM)
495  return reinterpret_cast<void*>(regs.__sp);
496 #elif CPU(ARM64)
497  return reinterpret_cast<void*>(regs.__sp);
498 #else
499 #error Unknown Architecture
500 #endif
501 
502 #else // !__DARWIN_UNIX03
503 
504 #if CPU(X86)
505  return reinterpret_cast<void*>(regs.esp);
506 #elif CPU(X86_64)
507  return reinterpret_cast<void*>(regs.rsp);
508 #elif CPU(PPC) || CPU(PPC64)
509  return reinterpret_cast<void*>(regs.r1);
510 #else
511 #error Unknown Architecture
512 #endif
513 
514 #endif // __DARWIN_UNIX03
515 
516 // end OS(DARWIN)
517 #elif OS(WINDOWS)
518 
519 #if CPU(ARM)
520  return reinterpret_cast<void*>((uintptr_t) regs.Sp);
521 #elif CPU(MIPS)
522  return reinterpret_cast<void*>((uintptr_t) regs.IntSp);
523 #elif CPU(X86)
524  return reinterpret_cast<void*>((uintptr_t) regs.Esp);
525 #elif CPU(X86_64)
526  return reinterpret_cast<void*>((uintptr_t) regs.Rsp);
527 #else
528 #error Unknown Architecture
529 #endif
530 
 484#if OS(DARWIN) || OS(WINDOWS)
 485 return MachineContext::stackPointer(regs);
531486#elif USE(PTHREADS)
532487
533 #if OS(FREEBSD) && ENABLE(JIT)
534 
535 #if CPU(X86)
536  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_esp);
537 #elif CPU(X86_64)
538  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_rsp);
539 #elif CPU(ARM)
540  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.__gregs[_REG_SP]);
541 #elif CPU(ARM64)
542  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_gpregs.gp_sp);
543 #elif CPU(MIPS)
544  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_regs[29]);
545 #else
546 #error Unknown Architecture
547 #endif
548 
549 #elif defined(__GLIBC__) && ENABLE(JIT)
550 
551 #if CPU(X86)
552  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.gregs[REG_ESP]);
553 #elif CPU(X86_64)
554  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.gregs[REG_RSP]);
555 #elif CPU(ARM)
556  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.arm_sp);
557 #elif CPU(ARM64)
558  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.sp);
559 #elif CPU(MIPS)
560  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.gregs[29]);
561 #else
562 #error Unknown Architecture
563 #endif
564 
 488#if (OS(FREEBSD) || defined(__GLIBC__)) && ENABLE(JIT)
 489 return MachineContext::stackPointer(regs.machineContext);
565490#else
566491 void* stackBase = 0;
567492 size_t stackSize = 0;

@@void* MachineThreads::Thread::Registers::stackPointer() const
586511#if ENABLE(SAMPLING_PROFILER)
587512void* MachineThreads::Thread::Registers::framePointer() const
588513{
589 #if OS(DARWIN)
590 
591 #if __DARWIN_UNIX03
592 
593 #if CPU(X86)
594  return reinterpret_cast<void*>(regs.__ebp);
595 #elif CPU(X86_64)
596  return reinterpret_cast<void*>(regs.__rbp);
597 #elif CPU(ARM)
598  return reinterpret_cast<void*>(regs.__r[11]);
599 #elif CPU(ARM64)
600  return reinterpret_cast<void*>(regs.__x[29]);
601 #else
602 #error Unknown Architecture
603 #endif
604 
605 #else // !__DARWIN_UNIX03
606 
607 #if CPU(X86)
608  return reinterpret_cast<void*>(regs.esp);
609 #elif CPU(X86_64)
610  return reinterpret_cast<void*>(regs.rsp);
611 #else
612 #error Unknown Architecture
613 #endif
614 
615 #endif // __DARWIN_UNIX03
616 
617 // end OS(DARWIN)
618 #elif OS(WINDOWS)
619 
620 #if CPU(ARM)
621  return reinterpret_cast<void*>((uintptr_t) regs.R11);
622 #elif CPU(MIPS)
623 #error Dont know what to do with mips. Do we even need this?
624 #elif CPU(X86)
625  return reinterpret_cast<void*>((uintptr_t) regs.Ebp);
626 #elif CPU(X86_64)
627  return reinterpret_cast<void*>((uintptr_t) regs.Rbp);
628 #else
629 #error Unknown Architecture
630 #endif
631 
632 #elif OS(FREEBSD)
633 
634 #if CPU(X86)
635  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_ebp);
636 #elif CPU(X86_64)
637  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_rbp);
638 #elif CPU(ARM)
639  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.__gregs[_REG_FP]);
640 #elif CPU(ARM64)
641  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_gpregs.gp_x[29]);
642 #elif CPU(MIPS)
643  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_regs[30]);
644 #else
645 #error Unknown Architecture
646 #endif
647 
648 #elif defined(__GLIBC__)
649 
650 // The following sequence depends on glibc's sys/ucontext.h.
651 #if CPU(X86)
652  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.gregs[REG_EBP]);
653 #elif CPU(X86_64)
654  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.gregs[REG_RBP]);
655 #elif CPU(ARM)
656  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.arm_fp);
657 #elif CPU(ARM64)
658  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.regs[29]);
659 #elif CPU(MIPS)
660  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.gregs[30]);
661 #else
662 #error Unknown Architecture
663 #endif
664 
 514#if OS(DARWIN) || OS(WINDOWS)
 515 return MachineContext::framePointer(regs);
 516#elif OS(FREEBSD) || defined(__GLIBC__)
 517 return MachineContext::framePointer(regs.machineContext);
665518#else
666519#error Need a way to get the frame pointer for another thread on this platform
667520#endif

@@void* MachineThreads::Thread::Registers::framePointer() const
669522
670523void* MachineThreads::Thread::Registers::instructionPointer() const
671524{
672 #if OS(DARWIN)
673 
674 #if __DARWIN_UNIX03
675 
676 #if CPU(X86)
677  return reinterpret_cast<void*>(regs.__eip);
678 #elif CPU(X86_64)
679  return reinterpret_cast<void*>(regs.__rip);
680 #elif CPU(ARM)
681  return reinterpret_cast<void*>(regs.__pc);
682 #elif CPU(ARM64)
683  return reinterpret_cast<void*>(regs.__pc);
684 #else
685 #error Unknown Architecture
686 #endif
687 
688 #else // !__DARWIN_UNIX03
689 #if CPU(X86)
690  return reinterpret_cast<void*>(regs.eip);
691 #elif CPU(X86_64)
692  return reinterpret_cast<void*>(regs.rip);
693 #else
694 #error Unknown Architecture
695 #endif
696 
697 #endif // __DARWIN_UNIX03
698 
699 // end OS(DARWIN)
700 #elif OS(WINDOWS)
701 
702 #if CPU(ARM)
703  return reinterpret_cast<void*>((uintptr_t) regs.Pc);
704 #elif CPU(MIPS)
705 #error Dont know what to do with mips. Do we even need this?
706 #elif CPU(X86)
707  return reinterpret_cast<void*>((uintptr_t) regs.Eip);
708 #elif CPU(X86_64)
709  return reinterpret_cast<void*>((uintptr_t) regs.Rip);
710 #else
711 #error Unknown Architecture
712 #endif
713 
714 #elif OS(FREEBSD)
715 
716 #if CPU(X86)
717  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_eip);
718 #elif CPU(X86_64)
719  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_rip);
720 #elif CPU(ARM)
721  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.__gregs[_REG_PC]);
722 #elif CPU(ARM64)
723  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_gpregs.gp_elr);
724 #elif CPU(MIPS)
725  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_pc);
726 #else
727 #error Unknown Architecture
728 #endif
729 
730 #elif defined(__GLIBC__)
731 
732 // The following sequence depends on glibc's sys/ucontext.h.
733 #if CPU(X86)
734  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.gregs[REG_EIP]);
735 #elif CPU(X86_64)
736  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.gregs[REG_RIP]);
737 #elif CPU(ARM)
738  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.arm_pc);
739 #elif CPU(ARM64)
740  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.pc);
741 #elif CPU(MIPS)
742  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.pc);
743 #else
744 #error Unknown Architecture
745 #endif
746 
 525#if OS(DARWIN) || OS(WINDOWS)
 526 return MachineContext::instructionPointer(regs);
 527#elif OS(FREEBSD) || defined(__GLIBC__)
 528 return MachineContext::instructionPointer(regs.machineContext);
747529#else
748530#error Need a way to get the instruction pointer for another thread on this platform
749531#endif
750532}
 533
751534void* MachineThreads::Thread::Registers::llintPC() const
752535{
753536 // LLInt uses regT4 as PC.
754 #if OS(DARWIN)
755 
756 #if __DARWIN_UNIX03
757 
758 #if CPU(X86)
759  static_assert(LLInt::LLIntPC == X86Registers::esi, "Wrong LLInt PC.");
760  return reinterpret_cast<void*>(regs.__esi);
761 #elif CPU(X86_64)
762  static_assert(LLInt::LLIntPC == X86Registers::r8, "Wrong LLInt PC.");
763  return reinterpret_cast<void*>(regs.__r8);
764 #elif CPU(ARM)
765  static_assert(LLInt::LLIntPC == ARMRegisters::r8, "Wrong LLInt PC.");
766  return reinterpret_cast<void*>(regs.__r[8]);
767 #elif CPU(ARM64)
768  static_assert(LLInt::LLIntPC == ARM64Registers::x4, "Wrong LLInt PC.");
769  return reinterpret_cast<void*>(regs.__x[4]);
770 #else
771 #error Unknown Architecture
772 #endif
773 
774 #else // !__DARWIN_UNIX03
775 #if CPU(X86)
776  static_assert(LLInt::LLIntPC == X86Registers::esi, "Wrong LLInt PC.");
777  return reinterpret_cast<void*>(regs.esi);
778 #elif CPU(X86_64)
779  static_assert(LLInt::LLIntPC == X86Registers::r8, "Wrong LLInt PC.");
780  return reinterpret_cast<void*>(regs.r8);
781 #else
782 #error Unknown Architecture
783 #endif
784 
785 #endif // __DARWIN_UNIX03
786 
787 // end OS(DARWIN)
788 #elif OS(WINDOWS)
789 
790 #if CPU(ARM)
791  static_assert(LLInt::LLIntPC == ARMRegisters::r8, "Wrong LLInt PC.");
792  return reinterpret_cast<void*>((uintptr_t) regs.R8);
793 #elif CPU(MIPS)
794 #error Dont know what to do with mips. Do we even need this?
795 #elif CPU(X86)
796  static_assert(LLInt::LLIntPC == X86Registers::esi, "Wrong LLInt PC.");
797  return reinterpret_cast<void*>((uintptr_t) regs.Esi);
798 #elif CPU(X86_64)
799  static_assert(LLInt::LLIntPC == X86Registers::r10, "Wrong LLInt PC.");
800  return reinterpret_cast<void*>((uintptr_t) regs.R10);
801 #else
802 #error Unknown Architecture
803 #endif
804 
805 #elif OS(FREEBSD)
806 
807 #if CPU(X86)
808  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_esi);
809 #elif CPU(X86_64)
810  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_r8);
811 #elif CPU(ARM)
812  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.__gregs[_REG_R8]);
813 #elif CPU(ARM64)
814  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_gpregs.gp_x[4]);
815 #elif CPU(MIPS)
816  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.mc_regs[12]);
817 #else
818 #error Unknown Architecture
819 #endif
820 
821 #elif defined(__GLIBC__)
822 
823 // The following sequence depends on glibc's sys/ucontext.h.
824 #if CPU(X86)
825  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.gregs[REG_ESI]);
826 #elif CPU(X86_64)
827  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.gregs[REG_R8]);
828 #elif CPU(ARM)
829  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.arm_r8);
830 #elif CPU(ARM64)
831  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.regs[4]);
832 #elif CPU(MIPS)
833  return reinterpret_cast<void*>((uintptr_t) regs.machineContext.gregs[12]);
834 #else
835 #error Unknown Architecture
836 #endif
837 
 537#if OS(DARWIN) || OS(WINDOWS)
 538 return MachineContext::llintInstructionPointer(regs);
 539#elif OS(FREEBSD) || defined(__GLIBC__)
 540 return MachineContext::llintInstructionPointer(regs.machineContext);
838541#else
839542#error Need a way to get the LLIntPC for another thread on this platform
840543#endif

Source/JavaScriptCore/heap/MachineStackMarker.h

2121
2222#pragma once
2323
 24#include "MachineContext.h"
2425#include "PlatformThread.h"
2526#include "RegisterState.h"
2627#include <wtf/Lock.h>

@@class MachineThreads {
8081 void* llintPC() const;
8182#endif // ENABLE(SAMPLING_PROFILER)
8283
83 #if OS(DARWIN)
84 #if CPU(X86)
85  typedef i386_thread_state_t PlatformRegisters;
86 #elif CPU(X86_64)
87  typedef x86_thread_state64_t PlatformRegisters;
88 #elif CPU(PPC)
89  typedef ppc_thread_state_t PlatformRegisters;
90 #elif CPU(PPC64)
91  typedef ppc_thread_state64_t PlatformRegisters;
92 #elif CPU(ARM)
93  typedef arm_thread_state_t PlatformRegisters;
94 #elif CPU(ARM64)
95  typedef arm_thread_state64_t PlatformRegisters;
96 #else
97 #error Unknown Architecture
98 #endif
99 
100 #elif OS(WINDOWS)
101  typedef CONTEXT PlatformRegisters;
 84#if OS(DARWIN) || OS(WINDOWS)
 85 using PlatformRegisters = MachineContext::PlatformRegisters;
10286#elif USE(PTHREADS)
10387 struct PlatformRegisters {
10488 pthread_attr_t attribute;

Source/JavaScriptCore/runtime/MachineContext.h

 1/*
 2 * Copyright (C) 2017 Yusuke Suzuki <utatane.tea@gmail.com>.
 3 *
 4 * Redistribution and use in source and binary forms, with or without
 5 * modification, are permitted provided that the following conditions
 6 * are met:
 7 * 1. Redistributions of source code must retain the above copyright
 8 * notice, this list of conditions and the following disclaimer.
 9 * 2. Redistributions in binary form must reproduce the above copyright
 10 * notice, this list of conditions and the following disclaimer in the
 11 * documentation and/or other materials provided with the distribution.
 12 *
 13 * THIS SOFTWARE IS PROVIDED BY APPLE INC. AND ITS CONTRIBUTORS ``AS IS''
 14 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 15 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 16 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR ITS CONTRIBUTORS
 17 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 18 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 19 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 20 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 21 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 22 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 23 * THE POSSIBILITY OF SUCH DAMAGE.
 24 */
 25
 26#pragma once
 27
 28#include "GPRInfo.h"
 29#include "LLIntPCRanges.h"
 30#include <wtf/StdLibExtras.h>
 31
 32#if OS(DARWIN) || OS(FREEBSD) || defined(__GLIBC__)
 33#include <signal.h>
 34// Using signal.h didn't make mcontext_t and ucontext_t available on FreeBSD.
 35// This bug has been fixed in FreeBSD 11.0-CURRENT, so this workaround can be
 36// removed after FreeBSD 10.x goes EOL.
 37// https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=207079
 38#if OS(FREEBSD)
 39#include <ucontext.h>
 40#endif
 41#endif
 42
 43namespace JSC {
 44namespace MachineContext {
 45#if OS(DARWIN) || OS(WINDOWS)
 46
 47#if OS(DARWIN)
 48#if CPU(X86)
 49typedef i386_thread_state_t PlatformRegisters;
 50#elif CPU(X86_64)
 51typedef x86_thread_state64_t PlatformRegisters;
 52#elif CPU(PPC)
 53typedef ppc_thread_state_t PlatformRegisters;
 54#elif CPU(PPC64)
 55typedef ppc_thread_state64_t PlatformRegisters;
 56#elif CPU(ARM)
 57typedef arm_thread_state_t PlatformRegisters;
 58#elif CPU(ARM64)
 59typedef arm_thread_state64_t PlatformRegisters;
 60#else
 61#error Unknown Architecture
 62#endif
 63
 64inline void*& stackPointer(PlatformRegisters& regs)
 65{
 66#if __DARWIN_UNIX03
 67
 68#if CPU(X86)
 69 return reinterpret_cast<void*&>(regs.__esp);
 70#elif CPU(X86_64)
 71 return reinterpret_cast<void*&>(regs.__rsp);
 72#elif CPU(PPC) || CPU(PPC64)
 73 return reinterpret_cast<void*&>(regs.__r1);
 74#elif CPU(ARM_THUMB2) || CPU(ARM) || CPU(ARM64)
 75 return reinterpret_cast<void*&>(regs.__sp);
 76#else
 77#error Unknown Architecture
 78#endif
 79
 80#else // !__DARWIN_UNIX03
 81
 82#if CPU(X86)
 83 return reinterpret_cast<void*&>(regs.esp);
 84#elif CPU(X86_64)
 85 return reinterpret_cast<void*&>(regs.rsp);
 86#elif CPU(PPC) || CPU(PPC64)
 87 return reinterpret_cast<void*&>(regs.r1);
 88#else
 89#error Unknown Architecture
 90#endif
 91
 92#endif // __DARWIN_UNIX03
 93}
 94
 95inline void*& framePointer(PlatformRegisters& regs)
 96{
 97#if __DARWIN_UNIX03
 98
 99#if CPU(X86)
 100 return reinterpret_cast<void*&>(regs.__ebp);
 101#elif CPU(X86_64)
 102 return reinterpret_cast<void*&>(regs.__rbp);
 103#elif CPU(ARM_THUMB2)
 104 return reinterpret_cast<void*&>(regs.__r[7]);
 105#elif CPU(ARM)
 106 return reinterpret_cast<void*&>(regs.__r[11]);
 107#elif CPU(ARM64)
 108 return reinterpret_cast<void*&>(regs.__x[29]);
 109#else
 110#error Unknown Architecture
 111#endif
 112
 113#else // !__DARWIN_UNIX03
 114
 115#if CPU(X86)
 116 return reinterpret_cast<void*&>(regs.esp);
 117#elif CPU(X86_64)
 118 return reinterpret_cast<void*&>(regs.rsp);
 119#else
 120#error Unknown Architecture
 121#endif
 122
 123#endif // __DARWIN_UNIX03
 124}
 125
 126inline void*& instructionPointer(PlatformRegisters& regs)
 127{
 128#if __DARWIN_UNIX03
 129
 130#if CPU(X86)
 131 return reinterpret_cast<void*&>(regs.__eip);
 132#elif CPU(X86_64)
 133 return reinterpret_cast<void*&>(regs.__rip);
 134#elif CPU(ARM_THUMB2) || CPU(ARM) || CPU(ARM64)
 135 return reinterpret_cast<void*&>(regs.__pc);
 136#else
 137#error Unknown Architecture
 138#endif
 139
 140#else // !__DARWIN_UNIX03
 141#if CPU(X86)
 142 return reinterpret_cast<void*&>(regs.eip);
 143#elif CPU(X86_64)
 144 return reinterpret_cast<void*&>(regs.rip);
 145#else
 146#error Unknown Architecture
 147#endif
 148
 149#endif // __DARWIN_UNIX03
 150}
 151
 152template<size_t N>
 153void*& argumentPointer(PlatformRegisters&);
 154
 155template<>
 156inline void*& argumentPointer<1>(PlatformRegisters& regs)
 157{
 158#if __DARWIN_UNIX03
 159
 160#if CPU(X86)
 161 return reinterpret_cast<void*&>(regs.__edx);
 162#elif CPU(X86_64)
 163 return reinterpret_cast<void*&>(regs.__rsi);
 164#elif CPU(ARM_THUMB2) || CPU(ARM)
 165 return reinterpret_cast<void*&>(regs.__r[1]);
 166#elif CPU(ARM64)
 167 return reinterpret_cast<void*&>(regs.__x[1]);
 168#else
 169#error Unknown Architecture
 170#endif
 171
 172#else // !__DARWIN_UNIX03
 173
 174#if CPU(X86)
 175 return reinterpret_cast<void*&>(regs.edx);
 176#elif CPU(X86_64)
 177 return reinterpret_cast<void*&>(regs.rsi);
 178#else
 179#error Unknown Architecture
 180#endif
 181
 182#endif // __DARWIN_UNIX03
 183}
 184
 185#if ENABLE(JIT)
 186inline void*& llintInstructionPointer(PlatformRegisters& regs)
 187{
 188 // LLInt uses regT4 as PC.
 189#if __DARWIN_UNIX03
 190
 191#if CPU(X86)
 192 static_assert(LLInt::LLIntPC == X86Registers::esi, "Wrong LLInt PC.");
 193 return reinterpret_cast<void*&>(regs.__esi);
 194#elif CPU(X86_64)
 195 static_assert(LLInt::LLIntPC == X86Registers::r8, "Wrong LLInt PC.");
 196 return reinterpret_cast<void*&>(regs.__r8);
 197#elif CPU(ARM)
 198 static_assert(LLInt::LLIntPC == ARMRegisters::r8, "Wrong LLInt PC.");
 199 return reinterpret_cast<void*&>(regs.__r[8]);
 200#elif CPU(ARM64)
 201 static_assert(LLInt::LLIntPC == ARM64Registers::x4, "Wrong LLInt PC.");
 202 return reinterpret_cast<void*&>(regs.__x[4]);
 203#else
 204#error Unknown Architecture
 205#endif
 206
 207#else // !__DARWIN_UNIX03
 208#if CPU(X86)
 209 static_assert(LLInt::LLIntPC == X86Registers::esi, "Wrong LLInt PC.");
 210 return reinterpret_cast<void*&>(regs.esi);
 211#elif CPU(X86_64)
 212 static_assert(LLInt::LLIntPC == X86Registers::r8, "Wrong LLInt PC.");
 213 return reinterpret_cast<void*&>(regs.r8);
 214#else
 215#error Unknown Architecture
 216#endif
 217
 218#endif // __DARWIN_UNIX03
 219}
 220#endif
 221
 222#elif OS(WINDOWS)
 223
 224typedef CONTEXT PlatformRegisters;
 225
 226inline void*& stackPointer(PlatformRegisters& regs)
 227{
 228#if CPU(ARM)
 229 return reinterpret_cast<void*&>((uintptr_t&) regs.Sp);
 230#elif CPU(MIPS)
 231 return reinterpret_cast<void*&>((uintptr_t&) regs.IntSp);
 232#elif CPU(X86)
 233 return reinterpret_cast<void*&>((uintptr_t&) regs.Esp);
 234#elif CPU(X86_64)
 235 return reinterpret_cast<void*&>((uintptr_t&) regs.Rsp);
 236#else
 237#error Unknown Architecture
 238#endif
 239}
 240
 241inline void*& framePointer(PlatformRegisters& regs)
 242{
 243#if CPU(ARM)
 244 return reinterpret_cast<void*&>((uintptr_t&) regs.R11);
 245#elif CPU(MIPS)
 246#error Dont know what to do with mips. Do we even need this?
 247#elif CPU(X86)
 248 return reinterpret_cast<void*&>((uintptr_t&) regs.Ebp);
 249#elif CPU(X86_64)
 250 return reinterpret_cast<void*&>((uintptr_t&) regs.Rbp);
 251#else
 252#error Unknown Architecture
 253#endif
 254}
 255
 256inline void*& instructionPointer(PlatformRegisters& regs)
 257{
 258#if CPU(ARM)
 259 return reinterpret_cast<void*&>((uintptr_t&) regs.Pc);
 260#elif CPU(MIPS)
 261#error Dont know what to do with mips. Do we even need this?
 262#elif CPU(X86)
 263 return reinterpret_cast<void*&>((uintptr_t&) regs.Eip);
 264#elif CPU(X86_64)
 265 return reinterpret_cast<void*&>((uintptr_t&) regs.Rip);
 266#else
 267#error Unknown Architecture
 268#endif
 269}
 270
 271template<size_t N>
 272void*& argumentPointer(PlatformRegisters&);
 273
 274template<>
 275inline void*& argumentPointer<1>(PlatformRegisters& regs);
 276{
 277#if CPU(ARM)
 278 return reinterpret_cast<void*&>((uintptr_t&) regs.R1);
 279#elif CPU(MIPS)
 280#error Dont know what to do with mips. Do we even need this?
 281#elif CPU(X86)
 282 return reinterpret_cast<void*&>((uintptr_t&) regs.Edx);
 283#elif CPU(X86_64)
 284 return reinterpret_cast<void*&>((uintptr_t&) regs.Rdx);
 285#else
 286#error Unknown Architecture
 287#endif
 288}
 289
 290#if ENABLE(JIT)
 291inline void*& llintInstructionPointer(PlatformRegisters& regs)
 292{
 293 // LLInt uses regT4 as PC.
 294#if CPU(ARM)
 295 static_assert(LLInt::LLIntPC == ARMRegisters::r8, "Wrong LLInt PC.");
 296 return reinterpret_cast<void*&>((uintptr_t&) regs.R8);
 297#elif CPU(MIPS)
 298#error Dont know what to do with mips. Do we even need this?
 299#elif CPU(X86)
 300 static_assert(LLInt::LLIntPC == X86Registers::esi, "Wrong LLInt PC.");
 301 return reinterpret_cast<void*&>((uintptr_t&) regs.Esi);
 302#elif CPU(X86_64)
 303 static_assert(LLInt::LLIntPC == X86Registers::r10, "Wrong LLInt PC.");
 304 return reinterpret_cast<void*&>((uintptr_t&) regs.R10);
 305#else
 306#error Unknown Architecture
 307#endif
 308}
 309#endif
 310
 311#endif
 312
 313inline void* stackPointer(const PlatformRegisters& regs)
 314{
 315 return stackPointer(const_cast<PlatformRegisters&>(regs));
 316}
 317
 318inline void* framePointer(const PlatformRegisters& regs)
 319{
 320 return framePointer(const_cast<PlatformRegisters&>(regs));
 321}
 322
 323inline void* instructionPointer(const PlatformRegisters& regs)
 324{
 325 return instructionPointer(const_cast<PlatformRegisters&>(regs));
 326}
 327
 328template<size_t N>
 329inline void* argumentPointer(const PlatformRegisters& regs)
 330{
 331 return argumentPointer<N>(const_cast<PlatformRegisters&>(regs));
 332}
 333
 334#if ENABLE(JIT)
 335inline void* llintInstructionPointer(const PlatformRegisters& regs)
 336{
 337 return llintInstructionPointer(const_cast<PlatformRegisters&>(regs));
 338}
 339#endif
 340
 341#endif
 342
 343#if OS(DARWIN) || ((OS(FREEBSD) || defined(__GLIBC__)) && (CPU(X86) || CPU(X86_64) || CPU(ARM) || CPU(ARM64) || CPU(MIPS)))
 344
 345inline void*& stackPointer(mcontext_t& machineContext)
 346{
 347#if OS(DARWIN)
 348 return stackPointer(machineContext->__ss);
 349#elif OS(FREEBSD)
 350
 351#if CPU(X86)
 352 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_esp);
 353#elif CPU(X86_64)
 354 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_rsp);
 355#elif CPU(ARM)
 356 return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_SP]);
 357#elif CPU(ARM64)
 358 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_gpregs.gp_sp);
 359#elif CPU(MIPS)
 360 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_regs[29]);
 361#else
 362#error Unknown Architecture
 363#endif
 364
 365#elif defined(__GLIBC__)
 366
 367#if CPU(X86)
 368 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[REG_ESP]);
 369#elif CPU(X86_64)
 370 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[REG_RSP]);
 371#elif CPU(ARM)
 372 return reinterpret_cast<void*&>((uintptr_t&) machineContext.arm_sp);
 373#elif CPU(ARM64)
 374 return reinterpret_cast<void*&>((uintptr_t&) machineContext.sp);
 375#elif CPU(MIPS)
 376 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[29]);
 377#else
 378#error Unknown Architecture
 379#endif
 380#endif
 381}
 382
 383inline void* stackPointer(const mcontext_t& machineContext)
 384{
 385 return stackPointer(const_cast<mcontext_t&>(machineContext));
 386}
 387
 388inline void*& framePointer(mcontext_t& machineContext)
 389{
 390#if OS(DARWIN)
 391 return framePointer(machineContext->__ss);
 392#elif OS(FREEBSD)
 393
 394#if CPU(X86)
 395 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_ebp);
 396#elif CPU(X86_64)
 397 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_rbp);
 398#elif CPU(ARM)
 399 return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_FP]);
 400#elif CPU(ARM64)
 401 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_gpregs.gp_x[29]);
 402#elif CPU(MIPS)
 403 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_regs[30]);
 404#else
 405#error Unknown Architecture
 406#endif
 407
 408#elif defined(__GLIBC__)
 409
 410// The following sequence depends on glibc's sys/ucontext.h.
 411#if CPU(X86)
 412 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[REG_EBP]);
 413#elif CPU(X86_64)
 414 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[REG_RBP]);
 415#elif CPU(ARM)
 416 return reinterpret_cast<void*&>((uintptr_t&) machineContext.arm_fp);
 417#elif CPU(ARM64)
 418 return reinterpret_cast<void*&>((uintptr_t&) machineContext.regs[29]);
 419#elif CPU(MIPS)
 420 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[30]);
 421#else
 422#error Unknown Architecture
 423#endif
 424
 425#else
 426#error Need a way to get the frame pointer for another thread on this platform
 427#endif
 428}
 429
 430inline void* framePointer(const mcontext_t& machineContext)
 431{
 432 return framePointer(const_cast<mcontext_t&>(machineContext));
 433}
 434
 435inline void*& instructionPointer(mcontext_t& machineContext)
 436{
 437#if OS(DARWIN)
 438 return instructionPointer(machineContext->__ss);
 439#elif OS(FREEBSD)
 440
 441#if CPU(X86)
 442 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_eip);
 443#elif CPU(X86_64)
 444 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_rip);
 445#elif CPU(ARM)
 446 return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_PC]);
 447#elif CPU(ARM64)
 448 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_gpregs.gp_elr);
 449#elif CPU(MIPS)
 450 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_pc);
 451#else
 452#error Unknown Architecture
 453#endif
 454
 455#elif defined(__GLIBC__)
 456
 457// The following sequence depends on glibc's sys/ucontext.h.
 458#if CPU(X86)
 459 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[REG_EIP]);
 460#elif CPU(X86_64)
 461 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[REG_RIP]);
 462#elif CPU(ARM)
 463 return reinterpret_cast<void*&>((uintptr_t&) machineContext.arm_pc);
 464#elif CPU(ARM64)
 465 return reinterpret_cast<void*&>((uintptr_t&) machineContext.pc);
 466#elif CPU(MIPS)
 467 return reinterpret_cast<void*&>((uintptr_t&) machineContext.pc);
 468#else
 469#error Unknown Architecture
 470#endif
 471
 472#else
 473#error Need a way to get the instruction pointer for another thread on this platform
 474#endif
 475}
 476
 477inline void* instructionPointer(const mcontext_t& machineContext)
 478{
 479 return instructionPointer(const_cast<mcontext_t&>(machineContext));
 480}
 481
 482template<unsigned N>
 483void*& argumentPointer(mcontext_t&);
 484
 485template<>
 486inline void*& argumentPointer<1>(mcontext_t& machineContext)
 487{
 488#if OS(DARWIN)
 489 return argumentPointer<1>(machineContext->__ss);
 490#elif OS(FREEBSD)
 491
 492#if CPU(X86)
 493 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_edx);
 494#elif CPU(X86_64)
 495 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_rsi);
 496#elif CPU(ARM)
 497 return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_R1]);
 498#elif CPU(ARM64)
 499 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_gpregs.gp_x[1]);
 500#elif CPU(MIPS)
 501 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_regs[5]);
 502#else
 503#error Unknown Architecture
 504#endif
 505
 506#elif defined(__GLIBC__)
 507
 508// The following sequence depends on glibc's sys/ucontext.h.
 509#if CPU(X86)
 510 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[REG_EDX]);
 511#elif CPU(X86_64)
 512 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[REG_RSI]);
 513#elif CPU(ARM)
 514 return reinterpret_cast<void*&>((uintptr_t&) machineContext.arm_r1);
 515#elif CPU(ARM64)
 516 return reinterpret_cast<void*&>((uintptr_t&) machineContext.regs[1]);
 517#elif CPU(MIPS)
 518 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[5]);
 519#else
 520#error Unknown Architecture
 521#endif
 522
 523#else
 524#error Need a way to get the frame pointer for another thread on this platform
 525#endif
 526}
 527
 528template<unsigned N>
 529inline void* argumentPointer(const mcontext_t& machineContext)
 530{
 531 return argumentPointer<N>(const_cast<mcontext_t&>(machineContext));
 532}
 533
 534#if ENABLE(JIT)
 535inline void*& llintInstructionPointer(mcontext_t& machineContext)
 536{
 537 // LLInt uses regT4 as PC.
 538#if OS(DARWIN)
 539 return llintInstructionPointer(machineContext->__ss);
 540#elif OS(FREEBSD)
 541
 542#if CPU(X86)
 543 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_esi);
 544#elif CPU(X86_64)
 545 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_r8);
 546#elif CPU(ARM)
 547 return reinterpret_cast<void*&>((uintptr_t&) machineContext.__gregs[_REG_R8]);
 548#elif CPU(ARM64)
 549 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_gpregs.gp_x[4]);
 550#elif CPU(MIPS)
 551 return reinterpret_cast<void*&>((uintptr_t&) machineContext.mc_regs[12]);
 552#else
 553#error Unknown Architecture
 554#endif
 555
 556#elif defined(__GLIBC__)
 557
 558// The following sequence depends on glibc's sys/ucontext.h.
 559#if CPU(X86)
 560 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[REG_ESI]);
 561#elif CPU(X86_64)
 562 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[REG_R8]);
 563#elif CPU(ARM)
 564 return reinterpret_cast<void*&>((uintptr_t&) machineContext.arm_r8);
 565#elif CPU(ARM64)
 566 return reinterpret_cast<void*&>((uintptr_t&) machineContext.regs[4]);
 567#elif CPU(MIPS)
 568 return reinterpret_cast<void*&>((uintptr_t&) machineContext.gregs[12]);
 569#else
 570#error Unknown Architecture
 571#endif
 572
 573#else
 574#error Need a way to get the LLIntPC for another thread on this platform
 575#endif
 576}
 577
 578inline void* llintInstructionPointer(const mcontext_t& machineContext)
 579{
 580 return llintInstructionPointer(const_cast<mcontext_t&>(machineContext));
 581}
 582#endif
 583
 584#endif
 585
 586}
 587}

Source/JavaScriptCore/runtime/PlatformThread.h

2929#include <pthread.h>
3030#endif
3131
 32#if USE(PTHREADS) && !OS(WINDOWS) && !OS(DARWIN)
 33#include <signal.h>
 34#endif
 35
3236#if OS(DARWIN)
3337#include <mach/thread_act.h>
3438#elif OS(WINDOWS)

@@inline bool platformThreadSignal(PlatformThread platformThread, int signalNumber
6367 int errNo = pthread_kill(pthreadID, signalNumber);
6468 return !errNo; // A 0 errNo means success.
6569}
 70#elif USE(PTHREADS)
 71inline bool platformThreadSignal(PlatformThread pthreadID, int signalNumber)
 72{
 73 int errNo = pthread_kill(pthreadID, signalNumber);
 74 return !errNo; // A 0 errNo means success.
 75}
6676#endif
6777
6878} // namespace JSC

Source/JavaScriptCore/runtime/VMTraps.cpp

3333#include "ExceptionHelpers.h"
3434#include "HeapInlines.h"
3535#include "LLIntPCRanges.h"
 36#include "MachineContext.h"
3637#include "MachineStackMarker.h"
3738#include "MacroAssembler.h"
3839#include "VM.h"

@@ALWAYS_INLINE VM& VMTraps::vm() const
5657struct sigaction originalSigusr1Action;
5758struct sigaction originalSigtrapAction;
5859
59 #if CPU(X86_64)
60 
6160struct SignalContext {
6261 SignalContext(mcontext_t& mcontext)
6362 : mcontext(mcontext)
64  , trapPC(reinterpret_cast<void*>(mcontext->__ss.__rip))
65  , stackPointer(reinterpret_cast<void*>(mcontext->__ss.__rsp))
66  , framePointer(reinterpret_cast<void*>(mcontext->__ss.__rbp))
 63 , trapPC(MachineContext::instructionPointer(mcontext))
 64 , stackPointer(MachineContext::stackPointer(mcontext))
 65 , framePointer(MachineContext::framePointer(mcontext))
6766 {
 67#if CPU(X86_64) || CPU(X86)
6868 // On X86_64, SIGTRAP reports the address after the trapping PC. So, dec by 1.
6969 trapPC = reinterpret_cast<uint8_t*>(trapPC) - 1;
 70#endif
7071 }
7172
7273 void adjustPCToPointToTrappingInstruction()
7374 {
74  mcontext->__ss.__rip = reinterpret_cast<uintptr_t>(trapPC);
75  }
76 
77  mcontext_t& mcontext;
78  void* trapPC;
79  void* stackPointer;
80  void* framePointer;
81 };
82 
83 #elif CPU(X86)
84 
85 struct SignalContext {
86  SignalContext(mcontext_t& mcontext)
87  : mcontext(mcontext)
88  , trapPC(reinterpret_cast<void*>(mcontext->__ss.__eip))
89  , stackPointer(reinterpret_cast<void*>(mcontext->__ss.__esp))
90  , framePointer(reinterpret_cast<void*>(mcontext->__ss.__ebp))
91  {
92  // On X86, SIGTRAP reports the address after the trapping PC. So, dec by 1.
93  trapPC = reinterpret_cast<uint8_t*>(trapPC) - 1;
94  }
95 
96  void adjustPCToPointToTrappingInstruction()
97  {
98  mcontext->__ss.__eip = reinterpret_cast<uintptr_t>(trapPC);
99  }
100 
101  mcontext_t& mcontext;
102  void* trapPC;
103  void* stackPointer;
104  void* framePointer;
105 };
106 
107 #elif CPU(ARM64) || CPU(ARM_THUMB2) || CPU(ARM)
108 
109 struct SignalContext {
110  SignalContext(mcontext_t& mcontext)
111  : mcontext(mcontext)
112  , trapPC(reinterpret_cast<void*>(mcontext->__ss.__pc))
113  , stackPointer(reinterpret_cast<void*>(mcontext->__ss.__sp))
114 #if CPU(ARM64)
115  , framePointer(reinterpret_cast<void*>(mcontext->__ss.__fp))
116 #elif CPU(ARM_THUMB2)
117  , framePointer(reinterpret_cast<void*>(mcontext->__ss.__r[7]))
118 #elif CPU(ARM)
119  , framePointer(reinterpret_cast<void*>(mcontext->__ss.__r[11]))
 75#if CPU(X86_64) || CPU(X86)
 76 MachineContext::instructionPointer(mcontext) = trapPC;
12077#endif
121  { }
122 
123  void adjustPCToPointToTrappingInstruction() { }
 78 }
12479
12580 mcontext_t& mcontext;
12681 void* trapPC;
12782 void* stackPointer;
12883 void* framePointer;
12984};
130 
131 #endif
13285
13386inline static bool vmIsInactive(VM& vm)
13487{

Source/JavaScriptCore/tools/CodeProfiling.cpp

2727#include "CodeProfiling.h"
2828
2929#include "CodeProfile.h"
 30#include "MachineContext.h"
3031#include <wtf/MetaAllocator.h>
3132
3233#if HAVE(SIGNAL_H)

@@static void setProfileTimer(unsigned usec)
6667#pragma clang diagnostic pop
6768#endif
6869
69 #if OS(DARWIN) && !PLATFORM(GTK) && CPU(X86_64)
70 static void profilingTimer(int, siginfo_t*, void* uap)
71 {
72  mcontext_t context = static_cast<ucontext_t*>(uap)->uc_mcontext;
73  CodeProfiling::sample(reinterpret_cast<void*>(context->__ss.__rip),
74  reinterpret_cast<void**>(context->__ss.__rbp));
75 }
76 #elif OS(LINUX) && CPU(X86)
 70#if (OS(DARWIN) && !PLATFORM(GTK) && CPU(X86_64)) || (OS(LINUX) && CPU(X86))
7771static void profilingTimer(int, siginfo_t*, void* uap)
7872{
7973 mcontext_t context = static_cast<ucontext_t*>(uap)->uc_mcontext;
80  CodeProfiling::sample(reinterpret_cast<void*>(context.gregs[REG_EIP]),
81  reinterpret_cast<void**>(context.gregs[REG_EBP]));
 74 CodeProfiling::sample(
 75 MachineContext::instructionPointer(context),
 76 reinterpret_cast<void**>(MachineContext::framePointer(context)));
8277}
8378#endif
8479

Source/JavaScriptCore/tools/SigillCrashAnalyzer.cpp

@@class SigillCrashAnalyzer {
7878
7979#endif // USE(OS_LOG)
8080
81 #if CPU(X86_64)
8281struct SignalContext {
8382 SignalContext(mcontext_t& mcontext)
8483 : mcontext(mcontext)
85  , machinePC(reinterpret_cast<void*>(mcontext->__ss.__rip))
86  , stackPointer(reinterpret_cast<void*>(mcontext->__ss.__rsp))
87  , framePointer(reinterpret_cast<CallFrame*>(mcontext->__ss.__rbp))
 84 , machinePC(MachineContext::instructionPointer(mcontext))
 85 , stackPointer(MachineContext::stackPointer(mcontext))
 86 , framePointer(MachineContext::framePointer(mcontext))
8887 { }
8988
9089 void dump()
9190 {
 91#if CPU(X86_64)
9292#define FOR_EACH_REGISTER(v) \
9393 v(rax) \
9494 v(rbx) \

@@struct SignalContext {
116116 log("Register " #__reg ": %p", reinterpret_cast<void*>(mcontext->__ss.__##__reg));
117117 FOR_EACH_REGISTER(DUMP_REGISTER)
118118#undef FOR_EACH_REGISTER
119  }
120 
121  mcontext_t& mcontext;
122  void* machinePC;
123  void* stackPointer;
124  void* framePointer;
125 };
126119
127120#elif CPU(ARM64)
128 
129 struct SignalContext {
130  SignalContext(mcontext_t& mcontext)
131  : mcontext(mcontext)
132  , machinePC(reinterpret_cast<void*>(mcontext->__ss.__pc))
133  , stackPointer(reinterpret_cast<void*>(mcontext->__ss.__sp))
134  , framePointer(reinterpret_cast<CallFrame*>(mcontext->__ss.__fp))
135  { }
136 
137  void dump()
138  {
139121 int i;
140122 for (i = 0; i < 28; i += 4) {
141123 log("x%d: %016llx x%d: %016llx x%d: %016llx x%d: %016llx",

@@struct SignalContext {
149131 i, mcontext->__ss.__x[i], mcontext->__ss.__fp, mcontext->__ss.__lr);
150132 log("sp: %016llx pc: %016llx cpsr: %08x",
151133 mcontext->__ss.__sp, mcontext->__ss.__pc, mcontext->__ss.__cpsr);
 134#endif
152135 }
153136
154  mcontext_t& mcontext;
155137 void* machinePC;
156138 void* stackPointer;
157139 void* framePointer;
158140};
159141
160 #else
161 
162 struct SignalContext {
163  SignalContext(mcontext_t&) { }
164 
165  void dump() { }
166 
167  void* machinePC;
168  void* stackPointer;
169  void* framePointer;
170 };
171 
172 #endif
173 
174142struct sigaction originalSigIllAction;
175143
176144static void handleCrash(int signalNumber, siginfo_t* info, void* uap)

Source/JavaScriptCore/tools/VMInspector.cpp

2929#include "CodeBlock.h"
3030#include "CodeBlockSet.h"
3131#include "HeapInlines.h"
 32#include "MachineContext.h"
3233#include <mutex>
3334#include <wtf/Expected.h>
3435

Source/JavaScriptCore/wasm/WasmFaultSignalHandler.cpp

2929#if ENABLE(WEBASSEMBLY)
3030
3131#include "ExecutableAllocator.h"
 32#include "MachineContext.h"
3233#include "VM.h"
3334#include "WasmExceptionType.h"
3435#include "WasmMemory.h"

@@static bool fastHandlerInstalled { false };
5051static StaticLock codeLocationsLock;
5152static LazyNeverDestroyed<HashSet<std::tuple<VM*, void*, void*>>> codeLocations; // (vm, start, end)
5253
53 // FIXME: Clean up mcontext_t handling code since it is scattered in heap/, tools/ and wasm/.
54 // https://bugs.webkit.org/show_bug.cgi?id=169180
55 #if CPU(X86_64)
56 
57 #if OS(DARWIN)
58 #define InstructionPointerGPR context->__ss.__rip
59 #define FirstArgumentGPR context->__ss.__rsi
60 #elif OS(FREEBSD)
61 #define InstructionPointerGPR context.mc_rip
62 #define FirstArgumentGPR context.mc_rsi
63 #elif defined(__GLIBC__)
64 #define InstructionPointerGPR context.gregs[REG_RIP]
65 #define FirstArgumentGPR context.gregs[REG_RSI]
66 #endif
67 
68 #else
69 
70 #if OS(DARWIN)
71 #define InstructionPointerGPR context->__ss.__pc
72 #define FirstArgumentGPR context->__ss.__x[1]
73 #elif OS(FREEBSD)
74 #define InstructionPointerGPR context.mc_gpregs.gp_elr
75 #define FirstArgumentGPR context.mc_gpregs.gp_x[1]
76 #elif defined(__GLIBC__)
77 #define InstructionPointerGPR context.pc
78 #define FirstArgumentGPR context.regs[1]
79 #endif
80 
81 #endif
82 
8354static void trapHandler(int signal, siginfo_t* sigInfo, void* ucontext)
8455{
8556 mcontext_t& context = static_cast<ucontext_t*>(ucontext)->uc_mcontext;
86  void* faultingInstruction = reinterpret_cast<void*>(InstructionPointerGPR);
 57 void* faultingInstruction = MachineContext::instructionPointer(context);
8758 dataLogLnIf(verbose, "starting handler for fault at: ", RawPointer(faultingInstruction));
8859
8960 dataLogLnIf(verbose, "JIT memory start: ", RawPointer(reinterpret_cast<void*>(startOfFixedExecutableMemoryPool)), " end: ", RawPointer(reinterpret_cast<void*>(endOfFixedExecutableMemoryPool)));

@@static void trapHandler(int signal, siginfo_t* sigInfo, void* ucontext)
12293 if (!exceptionStub)
12394 break;
12495 dataLogLnIf(verbose, "found stub: ", RawPointer(exceptionStub.code().executableAddress()));
125  FirstArgumentGPR = static_cast<uint64_t>(ExceptionType::OutOfBoundsMemoryAccess);
126  InstructionPointerGPR = reinterpret_cast<uint64_t>(exceptionStub.code().executableAddress());
 96 MachineContext::argumentPointer<1>(context) = reinterpret_cast<void*>(ExceptionType::OutOfBoundsMemoryAccess);
 97 MachineContext::instructionPointer(context) = exceptionStub.code().executableAddress();
12798 return;
12899 }
129100 }

Source/WTF/wtf/Platform.h

921921#endif
922922#endif
923923
924 #if OS(DARWIN) && ENABLE(JIT)
 924#if (OS(DARWIN) || OS(LINUX) || OS(FREEBSD)) && ENABLE(JIT)
925925#define ENABLE_SIGNAL_BASED_VM_TRAPS 1
926926#endif
927927